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? semiconductor components i1dustries, llc, 2006 july, 2006 ? rev. 1 1 publication order number: ncp1508/d ncp1508 up to 500 ma, 1 mhz, high efficiency synchronous step?down dc?dc converter in dfn package the ncp1508 step ? down pwm dc ? dc converter is optimized for portable applications powered from 1 ? cell li ? ion or 3 cell alkaline/nicd/nimh batteries. this dc ? dc converter utilizes a current ? mode control architecture for easy compensation and better line regulation. it also uses synchronous rectification to increase efficiency and reduce external part count. the ncp1508 optimizes efficiency in light load conditions when switched from a normal pwm mode to a ?pulsed switching? mode. the device also has a built ? in 1 mhz (nominal) oscillator for the pwm circuitry, or it can be synchronized to an external 500 khz to 1000 khz clock signal. finally, it includes an integrated soft ? start, cycle ? by ? cycle current limiting, and thermal shutdown protection. the ncp1508 is available in a space saving, low profile 3x3 mm 10 pin dfn package. features ? high efficiency: 93% for 1.89 v output at 3.6 v input and 125 ma load current 91% for 1.89 v output at 3.6 v input and 300 ma load current ? digital programmable output voltages: 1.0, 1.3, 1.5 or 1.89 v ? output current up to 500 ma at v in = 3.6 v ? low quiescent current of 14 a in pulsed switching mode ? low 0.2 a shutdown current ? ? 30 c to 85 c operation temperature ? low profile dfn package ? pb ? free package is available application ? cellular phones, smart phones and pdas ? digital still cameras ? mp3 players and portable audio systems ? wireless and dsl modems ? portable equipment marking diagram http://onsemi.com 1508 = specific device code a = assembly location l = wafer lot y = year w = work week 10 pin dfn mn suffix case 485c 1508 alyw device package shipping ? ordering information 10 pin dfn ncp1508mnr2 10 pin dfn (pb ? free) 3000 tape & reel NCP1508MNR2G 3000 tape & reel ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd801 1/d. 1 http://onsemi.com 1 figure 1. t ypical application circuit vcc vccp shd sync gnda gndp cb0 cb1 fb lx v in 2.7 v ? 5.2 v 6.8 h v out cb0 and cb1 control input c in 10 h c out 22 h 10 9 4 5 7 8 6 3 0 10 20 30 40 50 60 70 80 90 100 0.001 0.1 1 10 100 1000 i out (ma) efficiency (%) figure 2. efficiency vs. output current pulsed mode v in = 3.6 v v out = 1.5 v 0.01 pwm mode
ncp1508 http://onsemi.com 2 figure 3. simplified block diagram + ? ? + + ? + ? + ? + ? fb gnda cb0 cb1 shd isens isens senfet ilim zcl mode selection sync detect and timing block sync detect and timing block thermal shutdown enable detect select logic bandgap reference and soft start pwm ovp pm cmp cmp cmp cmp cmp oa q2 q1 dvr dvr compensation ramp control block (pwm,pm) gndp sync lx vcca vccp fb damping switching control damping switching control 2 10 6 3 4 5 6 1 7 8 9 pin function description pin no. symbol type description 1 gnda analog ground ground connection for the analog section of the ic. this is the gnd for the fb, ref, sync, cb, and shd pins. 2 gndp power ground ground connection for the n ? fet power stage. 3 lx analog output connection from power pass elements to the inductor. 4 vccp analog input power supply input for the switching p ? fet. 5 vcc analog input power supply input for power and analog v cc . 6 fb analog input feedback voltage from the output of the power supply. 7 cb0 analog input selects v out . this pin contains an internal pulldown resistor. 8 cb1 analog input selects v out . this pin contains an internal pullup resistor. 9 shd analog input enable for switching regulator. this pin is active high to enable the ncp1508. the shd pin has an internal pulldown resistor to force the converter off if this pin is not connected to the external circuit. 10 sync analog input synchronization input for the pwm converter. if a clock signal is present, the converter uses the rising edge for the turn on. if this pin is low, the converter is in the pulsed mode. if this pin is high, the converter uses the internal oscillator for the pwm mode. this pin contains an internal pulldown resistor.
ncp1508 http://onsemi.com 3 maximum ratings rating symbol value unit maximum v oltage all pins v max 5.5 v maximum operating voltage all pins v max 5.2 v thermal resistance, junction ? to ? air r ja 68.5 c/w operating ambient temperature range t a ? 30 to 85 c esd withstand voltage human body model (note 1) machine model (note 1) v esd > 2500 > 150 v moisture sensitivity msl level 1 storage temperature range t stg ? 55 to 150 c junction operating temperature t j ? 30 to 125 c stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above t he recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may af fect device reliability. 1. this device series contains esd protection and exceeds the following tests: human body model, 100 pf discharge through a 1.5 k following specification jesd22/a114. machine model, 200 pf discharged through all pins following specification jesd22/a115. latchup as per jesd78 class ii: > 100 ma.
ncp1508 http://onsemi.com 4 electrical characteristics (v in = 3.6 v, vo = 1.5 v, t a = 25 c, fsyn = 600 khz 50% duty cycle square wave for pwm mode; t a = ?30 to 85 c for min/max values, unless otherwise noted. characteristic symbol min typ max unit v cc pin quiescent current of sync mode, i out = 0 ma iq pwm ? 175 ? a quiescent current of pwm mode, i out = 0 ma iq pwm ? 185 ? a quiescent current of pulsed mode, i out = 0 ma iq pulsed ? 14 ? a quiescent current, shd low iq off ? 0.1 1.0 a input voltage range v in 2.5 ? 5.2 v sync pin input v oltage vsync ? 0.3 ? vcc + 0.3 v frequency operational range fsync 500 600 1000 khz minimum synchronization pulse width dcsync min ? 30 ? % maximum synchronization pulse width dcsync max ? 70 ? % sync ?h? v oltage threshold vsynch ? 920 1200 mv sync ?l? voltage threshold vsyncl 400 830 ? mv sync ?h? input current, vsync = 3.6 v isynch ? 2.2 ? a sync ?l? input current, vsync = 0 v isyncl ? 0.5 ? ? a output level selection pins input v oltage vcb ? 0.3 ? vcc + 0.3 v cb0, cb1 ?h? voltage threshold vcb h ? 920 1200 mv cb0, cb1 ?l? voltage threshold vcb l 400 830 ? mv cb0 ?h? input current, cb = 3.6 v icb0 h ? 2.2 ? a cb0 ?l? input current, cb = 0 v icb0 l ? 0.5 ? ? a cb1 ?h? input current, cb = 3.6 v icb1 h ? 0.3 1.0 a cb1 ?l? input current, cb = 0 v icb1 l ? ? 2.2 ? a shutdown pin input v oltage vshd ? 0.3 ? vcc + 0.3 v shd ?h? v oltage threshold vshd h ? 920 1200 mv shd ?l? voltage threshold vshd l 400 830 ? mv shd ?h? input current, shd = 3.6 v ishd h ? 2.2 ? a shd ?l? input current, shd = 0 v ishd l ? 0.5 ? ? a feedback pin input v oltage vfb ? 0.3 ? vcc + 0.3 v input current, vfb = 1.5 v ifb ? 5.0 7.5 a sync pwm mode characteristics switching p ? fet current limit i lim ? 800 ? ma duty cycle (note 2) dc ? ? 100 % minimum on time t on(min) ? 75 ? nsec r ds(on) switching p ? fet and n ? fet r ds(on) ? 0.23 ? switching p ? fet and n ? fet leakage current i leak ? 0 10 a output overvoltage threshold vo ? 5.0 ? %
ncp1508 http://onsemi.com 5 electrical characteristics (continued) (v in = 3.6 v, vo = 1.5 v, t a = 25 c, fsyn = 600 khz 50% duty cycle square wave for pwm mode; t a = ?30 to 85 c for min/max values, unless otherwise noted. characteristic symbol min typ max unit sync pwm mode characteristics (continued) feedback voltage accuracy, v out set = 1.0 v cb0 = l, cb1 = l, i out = 300 ma v out 0.950 1.000 1.050 v feedback voltage accuracy, v out set = 1.3 v cb0 = l, cb1 = h, i out = 300 ma v out 1.261 1.300 1.339 v feedback voltage accuracy, v out set = 1.5 v, cb0 = h, cb1 = h, i out = 300 ma v out 1.450 1.500 1.550 v feedback voltage accuracy, v out set = 1.89 v, cb0 = h, cb1 = l, i out = 300 ma v out 1.833 1.890 1.947 v line regulation, v in = 2.7 v ? 3.6 v, i out = 100 ma ? ? 15 ? +15 mv line regulation, v in = 3.6 v ? 5.2 v, i out = 100 ma ? ? 15 ? +15 mv load regulation, i out = 100 ma ? 300 ma ? ? 15 ? +15 mv load transient response, 10 to 100 ma load step v out ? 50 ? mv line transient response, i out = 100 ma, 3.0 to 3.6 v in line step v out ? 5.0 ? mvpp pwm mode with internal oscillator characteristics switching p ? fet current limit i lim ? 800 ? ma duty cycle (note 2) dc ? ? 100 % minimum on time t on(min) ? 75 ? nsec internal oscillator frequency ? t a = 25 c ?30 c t a 85 c fosc 760 700 980 980 1240 1240 khz r ds(on) switching p ? fet and n_fet r ds(on) ? 0.23 ? switching p ? fet and n ? fet leakage current i leak ? 0 10 a output overvoltage threshold vo ? 5.0 ? % feedback voltage accuracy, v out set = 1.0 v, cb0 = l, cb1 = l, i out = 300 ma v out 0.950 1.000 1.050 v feedback voltage accuracy, v out set = 1.3 v, cb0 = l, cb1 = h, i out = 300 ma v out 1.261 1.300 1.339 v feedback voltage accuracy, v out set = 1.5 v, cb0 = h, cb1 = h, i out = 300 ma v out 1.450 1.500 1.550 v feedback voltage accuracy, v out set = 1.89 v, cb0 = h cb1 = l, i out = 300 ma v out 1.833 1.890 1.947 v line regulation, v in = 2.7 v ? 3.6 v, i out = 100 ma ? ? 15 ? +15 mv line regulation, v in = 3.6 v ? 5.2 v, i out = 100 ma ? ? 15 ? +15 mv load regulation, i out = 100 ma ? 300 ma ? ? 15 ? +15 mv load transient response, 10 to 100 ma load step v out ? 50 ? mv line transient response, i out = 100 ma, 3.0 to 3.6 v in line step v out ? 5.0 ? mvpp pulsed mode characteristics peak current limit i lim ? 200 ? ma output current i out 0.05 ? 30 ma output ripple voltage, i out = 100 a v out ? 22 100 mv feedback voltage accuracy, v out set = 1.0 v, cb0 = l, cb1 = l v out 0.950 1.000 1.050 v feedback voltage accuracy, v out set = 1.3 v, cb0 = l, cb1 = h v out 1.261 1.300 1.339 v feedback voltage accuracy, v out set = 1.5 v, cb0 = h, cb1 = h v out 1.450 1.500 1.550 v feedback voltage accuracy, v out set = 1.89 v, cb0 = h, cb1 = l v out 1.833 1.890 1.947 v 2. maximum value is guaranteed by design.
ncp1508 http://onsemi.com 6 figure 4. eff iciency vs. output current in pwm mode v in (v) efficiency (%) 70 75 80 85 90 95 100 2.7 3.2 3.7 4.2 4.7 5.2 1.0 v out 1.3 v out 1.5 v out 1.89 v out i out = 100 ma freq = 1 mhz t a = 25 c i out (ma) efficiency (%) 0 100 200 300 400 500 1.89 v out 1.5 v out 1.3 v out 1.0 v out v in = 3.6 v pwm t a = 25 c figure 5. efficiency vs. input voltage in pwm mode figure 6. efficiency vs. output current at different input voltage figure 7. efficiency vs. frequency figure 8. efficiency vs. frequency figure 9. efficiency vs. output current in pulsed mode frequency (khz) efficiency (%) 500 700 900 1100 1300 1500 1.0 v out 1.3 v out 1.89 v out 1.5 v out v in = 3.6 v i out = 150 ma pwm t a = 25 c 80 84 82 86 88 90 94 0 10 20 30 40 50 60 70 80 90 100 0.01 0.1 1 10 100 0.001 i out (ma) efficiency (%) v in = 3.6 v pm t a = 25 c 0 10 20 30 40 50 60 70 80 90 100 i out (ma) efficiency (%) 0 100 200 300 400 500 3.6 v in 2.7 v in v out = 1.5 v pwm t a = 25 c 0 20 40 60 80 100 5.2 v in 92 frequency (khz) efficiency (%) 500 700 900 1100 1300 1500 1.0 v out 1.3 v out 1.89 v out 1.5 v out v in = 3.6 v i out = 300 ma pwm t a = 25 c 80 84 82 86 88 90 94 92 1.0 v out 1.3 v out 1.5 v out 1.89 v out 10 30 50 70 90
ncp1508 http://onsemi.com 7 figure 10. input current comparison figure 11. output voltage vs. output current figure 12. load regulation in pwm mode 60 40 20 0 ? 20 ? 40 temperature ( c) frequency (khz) 1100 1050 1000 950 900 850 v in = 3.6 v v out = 1.5 v i out = 100 ma pwm v in (v) figure 13. output v oltage vs. temperature figure 14. oscillator frequency vs. temperature figure 15. oscillator frequency vs. input voltage 0 4 8 12 16 0 5 10 15 20 30 i out (ma) i in (ma) pwm pulsed mode 0.6 0.8 1.2 2.0 0 100 200 500 i out (ma) v out (v) 1.6 1.0 1.4 1.8 300 1.5 v out 1.3 v out 1.0 v out 1.89 v out v in = 3.6 v pwm t a = 25 c 20 ? 10 0 20 0 100 200 500 i out (ma) delta v out (mv) 40 10 30 300 1.5 v out 1.3 v out 1.0 v out 1.89 v out ? 40 ? 30 ? 20 v in = 3.6 v pwm t a = 25 c 0.5 0.8 2.0 ? 40 ? 20 0 100 temperature ( c) v out (v) 1.1 1.4 20 1.5 v out 1.3 v out 1.0 v out 1.89 v out v in = 3.6 v i out = 100 ma pwm 25 v in = 3.6 v v out = 1.5 v t a = 25 c 400 400 1.7 40 60 80 100 80 5.2 4.7 4.2 3.7 3.2 2.7 frequency (khz) 1100 1050 1000 950 900 850 v out = 1.5 v i out = 100 ma t a = 25 c pwm
ncp1508 http://onsemi.com 8 figure 16. output voltage vs. shutdown pin voltage 1.4 0.6 0.4 0.2 0 v shd (v) v out (v) 1.5 0 1.2 1.0 0.8 figure 17. transition level of cb pins 1.4 0.6 0.4 0.2 0 v cb (v) v out (v) 1.5 0 0.5 1 1.2 1.0 0.8 2 2 1 0.5 v in = 3.6 v v out = 1.5 v pwm t a = 25 c v in = 3.6 v v out = 1.5 v pwm t a = 25 c figure 18. light ? load pwm switching waveform (v in = 3.6 v, v out = 1.5 v, i out = 30 ma) figure 19. heavy ? load pwm switching waveform (v in = 3.6 v, v out = 1.5 v, i out = 300 ma) figure 20. pulsed mode switching waveform (v in = 3.6 v, v out = 1.5 v, i out = 30 ma) figure 21. soft ? start (v in = 3.6 v, v out = 1.5 v, i out = 150 ma) 1 s/div 1 s/div 1 s/div 500 s/div 0.5v/div vout 1v/div vshdn 0 0
ncp1508 http://onsemi.com 9 figure 22. line transient response figure 23. load transient response figure 24. output voltage transition from 1.57 v to 1.8 v
ncp1508 http://onsemi.com 10 detailed operating description overview the ncp1508 is a monolithic micro ? power high frequency pwm step ? down dc ? dc converter specifically optimized for applications requiring high efficiency and a small pcb footprint such as portable battery powered products. it integrates synchronous rectification to improve efficiency as well as eliminate the external schottky diode. high switching frequency allows for a low profile inductor and capacitors to be used. four digital selectable output voltages (1.0, 1.3, 1.5 and 1.89 v) can be generated from the input supply that can range from 2.7 ? 5.2 v. all loop compensation is integrated as well further reducing the external component count as well. the dc ? dc converter has two operating modes (normal pwm, pulsed switching), which are intended to allow for optimum efficiency under either light (up to 30 ma) or heavy loads. the user determines the operating mode by controlling the sync input. in addition the sync input can be used to synchronize the pwm to an external system clock signal in the range of 500 ? 1000 khz. pwm operating mode the ncp1508 can be set to current mode pwm operation by connecting sync pin to v cc . in this mode, the output voltage is regulated by modulating on ? time pulse width of the main switch q1 at a fixed frequency of 1 mhz. the switching of the pmos q1 is controlled by a flip ? flop driven by the internal oscillator and a comparator that compares the error signal from an error amplifier with the sum of the sensed current signal and compensation ramp. at the beginning of each cycle, the main switch q1 is turned on by the rising edge of the internal oscillation clock. the inductor current ramps up until the sum of the current sense signal and compensation ramp becomes higher than the error voltage amplifier. once this has occurred, the pwm comparator resets the flip ? flop, q1 is turned off and the synchronous switch q2 is turned on. q2 replaces the external schottky diode to reduce the conduction loss and improve the efficiency. to avoid overall power loss, a certain amount of dead time is introduced to ensure q1 is completely turned off before q2 is being turned on. in continuous conduction mode (ccm), q1 is turned on after q2 is completely turned off to start a new clock cycle. in discontinuous conduction mode (dcm), the zero crossing comparator (zlc) will turn off q2 when the inductor current drops to zero. overvoltage protection the overvoltage protection circuit is present in pwm mode to prevent the output voltage from going too high under light load or fast load transient conditions. the output overvoltage threshold is 5% above nominal set value. if the output voltage rises above 5% of the nominal value, the ovp comparator is activated and switch q1 is turned off. switching will continue when the output voltage falls below the threshold of ovp comparator. pulsed mode (pm) under light load conditions (< 30 ma), ncp1508 can be configured to enter a low current pulsed mode operation to reduce power consumption. this is accomplished by sync pin held low. the output regulation is implemented by pulse frequency modulation. if the output voltage drops below the threshold of pm comparator (typically vnom ? 2%), a new cycle will be initiated by the pm comparator to turn on the switch q1. q1 remains on until 200 ma inductor peak current is reached. then ilim comparator goes high to switch off q1. after a short dead time delay, switch rectifier q2 is turn on. the zero crossing comparator will detect when the inductor current drops to zero and send the signal to turn off q2. the output voltage continues to decrease through discharging the output capacitor. when the output voltage falls below the threshold of pm comparator again, a new cycle starts immediately. cycle ? by ? cycle current limit from the block diagram (figure 3), an ilim comparator is used to realize cycle ? by ? cycle current limit protection. the comparator compares the lx pin voltages with the reference voltage from the senfet, which is biased by constant current. if the inductor current reaches the limit, ilim comparator detects the lx voltage falling below the reference voltage from senfet and releases the signal to turn off the switch q1. the cycle ? by ? cycle current limit is set at 800 ma in pwm and 200 ma in pm. frequency synchronization and operating mode selection the sync pin can also be used for frequency synchronization by connecting it with an external clock signal. it operates in pwm mode when synchronized to an external clock. the switching cycle initiates by the rising edge of the clock. the synchronization clock signals between 0.4 v and 1.2 v from 500 khz to 1000 khz. gating on and off the clock, the sync pin can also be used to select between pm and pwm modes. it allows efficient dynamical power management by adjusting the converter operation to the specific system requirement. set sync pin low to select pm mode at light load conditions (up to 30 ma) and set sync pin high or connect with external clock to select pwm mode at heavy load condition to achieve optimum efficiency. table 1 shows the mode selection with three different sync pin states.
ncp1508 http://onsemi.com 11 table 1. operating mode selection sync pin state operating mode low pulsed mode (pm) high pwm, 1 mhz switch frequency clock pwm, frequency synchronization output voltage selection the output voltage is digitally programmed to one of four voltage levels depending on the logic state of cb0 and cb1. therefore if the ncp1508?s load, such as a digital cellular phone?s baseband processor, supports dynamic power management, the device can lower or raise its core voltage under software control. when combined with the pulsed current mode function in low load situations, this active voltage management further stretches the useful operating life of the handset between charges. figure 24 shows a typical transition between 1.5 to 1.89 volts. the output voltage levels are listed in table 2. the cb0 has a pull down resistor and the cb1 has a pullup resistor. the default output voltage is 1.3 v when cb0 and cb1 are floating. table 2. truth table for cb0 and cb1 with the corresponding output voltage cb0 cb1 vout(v) 0 0 1.0 0 1 1.3 1 1 1.5 1 0 1.89 soft ? start the ncp1508 uses soft ? start to limit the inrush current when the device is initially powered up or enabled. soft ? start is implemented by gradually increasing the reference voltage until it reaches the full reference voltage. during startup, a pulsed current source charges the internal soft ? start capacitor to provide gradually increasing reference voltage for the pwm loop. when the voltage across the capacitor ramps up to the nominal reference voltage, the pulsed current source will be switched off and the reference voltage will switch to the regular reference voltage. from figure 21, it show the soft ? start time is about 1.5 ms. shutdown mode when the shd pin has a voltage applied of less than 0.4 v, the ncp1508 will be disabled. in shutdown mode, the internal reference, oscillator and most of the control circuitries are turned off. therefore, the typical current consumption will be 0.1 a (typical value). applying a voltage above 1.2 v to shd pin will enable the device for normal operation. the device will go through soft ? start to normal operation. thermal shutdown internal thermal shutdown circuitry is provided to protect the integrated circuit in the event that the maximum junction temperature is exceeded. if the junction temperature exceeds 160 c, the device shuts down. in this mode switch q1 and q2 and the control circuits are all turned off. the device restarts in soft ? start after the temperature drops below 135 c. this feature is provided to prevent catastrophic failures from accidental device overheating and it is not intended as a substitute for proper heatsinking.
ncp1508 http://onsemi.com 12 applications information component selection input capacitor selection in pwm operating mode, the input current is pulsating with large switching noise. using an input bypass capacitor can reduce the peak current transients drawn from the input supply source, thereby reducing switching noise significantly. the capacitance needed for the input bypass capacitor depends on the source impedance of the input supply. the rms capacitor current is calculated as: i rms i o d d (eq. 1) the maximum rms current occurs at 50% duty cycle with maximum output current, which is i o,max /2. for ncp1508, a low profile ceramic capacitor of 10 f should be used for most of the cases. for effective bypass results, the input capacitor should be placed as close as possible to the v cc pin. inductor value selection selecting the proper inductor value is based on the desired ripple current. the relationship between the inductance and the inductor ripple current is given by the equation in below. i l v out lf s 1 v out v in
(eq. 2) large value inductors will have small ripple current and low value inductor will have high ripple current. for ncp1508, the compensation is internally fixed and a fixed 6.8 h inductor is needed for most of the applications. output capacitor selection selecting the proper output capacitor is based on the desired output ripple voltage. ceramic capacitors with low esr values will have the lowest output ripple voltage and are strongly recommended. the output ripple voltage is given by: v c i l esr 1 4f s c out
(eq. 3) the rms output capacitor current is given by: i rms ( c out ) v o ( 1 d ) 23 l f s (eq. 4) where f s is the switching frequency and esr is the effective series resistance of the output capacitor. a low esr, 22 f ceramic capacitor is recommended for ncp1508 in most of applications. for example, with tdk c2012x5r0j226 output capacitor, the output ripple is less than 10 mv at 300 ma. design example as a design example, assume that the ncp1508 is used in a single lithium ? ion battery application. the input voltage, v in , is 3.0 v to 4.2 v. output condition is v out at 1.5 v with a typical load current of 120 ma and a maximum of 300 ma. for ncp1508, the inductor has a predetermined value, 6.8 h. the inductor esr will factor into the overall efficiency of the converter. the inductor needs to be selected by the required peak current. equation 5 is the basic equation for an inductor and describes the voltage across the inductor. the inductance value determines the slope of the current of the inductor. v l l di l d t (eq. 5) equation 5 is rearranged to solve for the change in current for the on ? time of the converter in continuous conduction mode. (eq. 6) i l, pk ? pk ( v in v out ) l dt s ( v in v out ) l v in v out 1 f s i l, max i o, max i l, pk ? pk 2 utilizing equations 6, the peak ? to ? peak inductor current is calculated using the following worst ? case conditions. v in, max 4.2 v, v out 1.5 v, f s 1mhz ? 20%, l 6.8 h ? 10%, i l, pk ? pk 197 ma, i l, max 399 ma therefore, the inductor must have a maximum current exceeding 405 ma. since the compensation is fixed internally in the ic, the input and output capacitors as well as the inductor have a predetermined value too: c in = 10 f and c out = 22 f. low esr capacitors are needed for best performance. therefore, ceramic capacitors are recommended. please see table 3 for recommended inductors and capacitors. pcb layout recommendations good pcb layout plays an important role in switching mode power conversion. careful pcb layout can help to minimize ground bounce, emi noise and unwanted feedbacks that can af fect the performance of the converter. hints suggested below can be used as a guideline in most situations. 1. use star ? ground connection to connect the ic ground nodes and capacitor gnd nodes together at one point. keep them as close as possible. and then connect this to the ground plane (if it is used) through several vias. this will reduce noise in ground plane by preventing the switching currents from flowing through the ground plane. 2. place the power components (i.e., input capacitor, inductor and output capacitor) as close together as possible for best performance. all connecting traces must be short, direct, and thick to reduce voltage errors caused by resistive losses across these traces. 3. separate the feedback path of the output voltage from the power path. keep this path close to the ncp1508 circuit. and also route it away from noisy components.
ncp1508 http://onsemi.com 13 this will prevent noise from coupling into voltage feedback trace. 4. place the dc ? dc converter away from noise sensitive circuitry, such as rf circuits. interference with noise sensitive circuitry in the dc ? dc converter can be reduced by distance between them. the following shows ncp1508 demo board layout and suggested bill of materials. figure 25. top and silkscreen layer figure 26. soldermask top and silkscreen layer
ncp1508 http://onsemi.com 14 figure 27. bottom layer table 3. bill of materials component value manufacturer part number size (mm) i out (ma) esr (m ) c in 10 f, x5r, 6.3 v tdk murata c2012x5r0j106 grm21br60j106 2.0 x 1.25 x 1.25 ? ? c out 22 f, x5r, 6.3 v tdk murata c2012x5r0j226 grm21br60j226 2.0 x 1.25 x 1.25 ? ? l 6.8 h tdk coilcraft coilcraft sumida vlcf4020 ? 6r8 0805ps ? 682 lpo4812 cls4d11 4.0 x 4.0 x 2.0 3.4 x 3.0 x 1.8 4.8 x 4.8 x 1.2 4.9 x 4.9 x 1.2 500** 210* 340* 500** 146 1260 225 220 *output current calculated from v cc = 4.2 v max , 1.5 v out and freq = 700 khz (1.0 mhz ? 20 %). **calculated output current from v cc = 4.2 v max and freq = 700 khz exceeds 640 ma (i lim ? 20%). therefore maximum output for these conditions shown as 500 ma.
ncp1508 http://onsemi.com 15 package dimensions 10 pin dfn mn suffix case 485c ? 01 issue o x m 0.10 (0.004) t dim min max min max inches millimeters a 3.00 bsc 0.118 bsc b 3.00 bsc 0.118 bsc c 0.80 1.00 0.031 0.039 d 0.20 0.30 0.008 0.012 g 0.50 bsc 0.020 bsc h 1.23 1.28 0.048 0.050 j 0.20 ref 0.008 ref k 0.00 0.05 0.000 0.002 l 0.35 0.45 0.014 0.018 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeters. 3. dimension d applies to plated terminal and is measured between 0.25 and 0.30 mm from terminal. 4. coplanarity applies to the exposed pad as well as the terminals. ? t ? ? x ? note 3 seating plane l a m ? y ? b n 0.25 (0.010) t 0.25 (0.010) t j c k r g e h f p d y 10 1 e 2.45 2.55 0.096 0.100 f 1.75 1.85 0.069 0.073 m 1.50 bsc 0.059 bsc n 1.50 bsc 0.059 bsc p 0.88 0.93 0.035 0.037 r 0.60 0.80 0.024 0.031 2 pl 2 pl 10 pl for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting t echniques reference manual, solderrm/d. on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for an y particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, in cluding without limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different a pplications and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s technical e xperts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc prod uct could create a s ituation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indem nify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney f ees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was neglig ent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5773 ? 3850 ncp1508/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative

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